1. Field of Invention
The present invention concerns Metallic Oxide Semiconductor Field Effect Transistor (MOSFET) devices and, more particularly, a method and apparatus for preventing MOSFET device failure resulting from exposure to high energy level radiation.
2. Description of the Prior Art
Electronic devices such as, for example, MOSFETs and bipolar transistors, typically experience a degradation in performance when subjected to various levels of radiation. Repeated exposures to low energy level radiation, for example, can produce cumulative effects which may change the operating characteristics of the device. Repeated exposures to low level radiation can, over a period of time, eventually cause the device to become inoperative or lead to erratic behavior which renders the device useless. Exposure to high energy radiation fluxes (as might be experienced by exposure to a nuclear blast or proximity to a nuclear reactor) typically produce an essentially instantaneous destruction of the device.
A variety of schemes have been devised to avoid radiation failure in bipolar transistor devices. Far less, however, has been accomplished to prevent radiation failure in MOSFET devices. Because of fundamental structural difference between bipolar transistors and MOSFET devices, the various schemes for protecting bipolar devices are not generally applicable to MOSFET devices. What little is known with respect to preventing MOSFET radiation failure is practical only with respect to low energy levels of radiation exposure. No useful schemes are known for protecting MOSFET transistors against high energy radiation exposure.
Two U.S. patents address circumventing radiation failure in MOSFET devices. These are U.S. Pat. Nos. 4,011,471 and 4,313,846. Both of these patents, however, are directed to only stabilizing or correcting the degradation of MOSFET device operating characteristics resulting from cumulative low level radiation exposures. The voltages at which MOSFET devices turn "on" shift as a result of low level radiation exposure. Each of the above patents introduces corrective circuitry to account for a permanent shift and/or time varying drift in this "on" voltage. A further reference, IBM Technical Disclosure Bulletin, Vol. 25No. 11A, Apr. 1983, also is directed to low level radiation induced "on" voltage shift and/or drift correction.
Aside from the above noted approaches for correcting MOSFET responses to low level radiation flux exposure, there have been two other suggested approaches to protecting MOSFET devices from high energy level radiation fluxes. The first approach entails either limiting or shutting off the voltage source to the MOSFET device during a radiation exposure event to curtail destructive power surges occurring during recovery of the MOSFET after the radiation exposure event. The idea being to simply take the MOSFET out of the circuit during a radiation event. This approach has a number of limitations, however. It is very difficult to ground a MOSFET voltage source during a radiation event since the circuitry needed to effect this grounding is itself subject erratic response during the same radiation event. It is even more difficult to attempt to limit or attenuate a MOSFET voltage source so as to avoid destructive power surges.
The second approach to preventing MOSFET failure from high energy level radiation exposure is to attempt to enhance or modify the fundamental characteristics of the MOSFET device itself so that high energy level radiation exposures cease to destroy the modified MOSFET device. Since this approach typically requires exotic control over the composition and the doping of the MOSFET device substrate and its N or P wells, it is difficult if not impossible to implement this approach without adversely affecting the general operating characteristics of the MOSFET device such as, for example, its threshold "on" voltage and the like.